Review of Network on Chip Routing Algorithms

Ahmad, Khurshid and Sethi, Muhammad Athar Javed (2020) Review of Network on Chip Routing Algorithms. EAI Endorsed Transactions on Context-aware Systems and Applications, 7 (22). p. 167793. ISSN 2409-0026

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Abstract

System on chip (SoC) is an integrated circuit in which components are communicating through the bus interconnection system. Network on chip (NoC) is a communication network for a multiprocessor system on chip (MPSoC). In NoC architecture node/ component of MPSOC are communicating through a network. The performance of NoC architecture depends on topology, routing algorithm and switching technique. In this paper, different NoC routing algorithms are review using basic parameters of NoC architecture and also provide some information about these parameters. It is concluded that most of the researchers are interested in design of the NoC routing algorithm, which efficiently transmits data from source to destination. When the routing algorithm is congestion aware, fault-tolerant, deadlock-free and live-lock free, then the latency of algorithm decreases and throughput increases.

Item Type: Article
Uncontrolled Keywords: System on Chip, Network on Chip, Routing Algorithm
Subjects: Q Science > QA Mathematics > QA75 Electronic computers. Computer science
QA75 Electronic computers. Computer science
Depositing User: EAI Editor II.
Date Deposited: 21 Jan 2021 06:55
Last Modified: 21 Jan 2021 06:55
URI: https://eprints.eudl.eu/id/eprint/812

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